Remove item Thumbnail image Product Price Quantity Subtotal
× FPGA (using VERILOG) ₹1,499.00
₹1,499.00
× Matlab code for Embedded Zero Wavelet (EZW) Image Compression ₹3,000.00
₹3,000.00

Cart totals

Subtotal ₹4,499.00
Total ₹4,499.00
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